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Honored Contributor
Honored ContributorInstantiating Arria ii half-dsp block
Hi, I've got a semi-parallel FIR design that would map nicely into a cascade of Arria ii Half-DSP blocks, and would like to instantiate the Arria ii Half-DSP block in my VHDL code. I don't...
Altera_ForumHonored Contributor
Honored ContributorQuartus should be able to automatically infer them from VHDL.
Follow the HDL coding guidelines. http://www.altera.com/literature/hb/qts/qts_qii51007.pdf
