Forum Discussion
Gianfranco9635
New Contributor
New ContributorInout port became output
Hi guys, i'm trying to create a project based on a Bridge SPI to Avalon. In my top entity i have a signal that is defined as "INOUT" and that represent the I/O of my fpga (name signal is LSASBUS)....
Hi,
Check this KDB https://www.intel.com/content/www/us/en/support/programmable/articles/000086339.html, this is known previous problem and had been concluded using the workaround clean the project before running compilation to resolve the problem. Based on previous internal team reply: There is no capacity or further step taken for this.
The problem only exists in linux version but not in window version.
Thanks,
Regards,
Sheng
ShengN_altera
Super Contributor
Super ContributorOr you may also create tcl script like below and run with quartus_sh -t:
package require ::quartus::project
package require ::quartus::flow
project_open -revision test test
project_clean
project_open -revision test test
execute_flow -compile
