Forum Discussion

Gianfranco9635's avatar
Gianfranco9635
Icon for New Contributor rankNew Contributor
1 year ago
Solved

Inout port became output

Hi guys, i'm trying to create a project based on a Bridge SPI to Avalon. In my top entity i have a signal that is defined as "INOUT" and that represent the I/O of my fpga (name signal is LSASBUS)....
Board Debug
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
1 year ago

Or you may also create tcl script like below and run with quartus_sh -t:

package require ::quartus::project

package require ::quartus::flow


project_open -revision test test

project_clean

project_open -revision test test

execute_flow -compile