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Altera_Forum's avatar
Altera_Forum
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12 years ago

inductor value in usb blaster and what is CPLD ISP part no

Hi, I'm currently building a low cost FPGA board for my school project. Referencing to DE0 schematic diagram for USB Blaster circuit: 1) What is the value of L1 & L2? and what does BEAD me...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hi,

I have discuss with my school and they allow me to buy the USB blaster cable. Now I have a simpler design for this project.

Anyway, can I design a simple FPGA board with just basic i/o without any external memory? My target is just to download simple logic block diagram onto it test using the i/o.

I have assigned some pins to the i/o. Can someone help to verify if the assignment is correct? Thank you.