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Altera_Forum
Honored Contributor
15 years agoIncrementing loop index in vhdl generate statement
Hi, I am working on an HDL for an Altera design. I came a situation where i want to increment vhdl generate loop index by 2. An example is show below, LABEL: for i in 1 to CNTR_WIDTH ...
Altera_Forum
Honored Contributor
15 years agojust multiply i by 2
REG1(i*2) <= ORG_REG(i*2)(1 downto 0); REG1(i*2 +1) <= ORG_REG(i*2)(3 downto 2);