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Altera_Forum
Honored Contributor
17 years agoIncremental compilation
I came across this warning: Warning: One or more LogicLock region membership assignments are unused .I have set the design partition and set the logiclock region size and location. while it st...
Altera_Forum
Honored Contributor
17 years ago --- Quote Start --- I came across this warning: Warning: One or more LogicLock region membership assignments are unused .I have set the design partition and set the logiclock region size and location. while it still wasn't solved. --- Quote End --- Hi, maybe some of your assigened nodes are optimized away by the Quartus synthesis. Kind regards GPK