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Altera_Forum
Honored Contributor
19 years agoIncrease ADC resolution
Hi I'm new to FPGA's. I need to increase the resolution of an 8bit 40Msps ADC through oversampling. I would just like to know if it is possible to implement this on a cycloneII. If anyone also ...
Altera_Forum
Honored Contributor
19 years agoThis is farly easy to do with altera's FIR compiler. You start the megawizard and selects your architecture, decimation rate and it basically generates the filter for you. The most difficult part is, I would say, scaling of the result and interfacing to your adc, in particluar if it is not a parallel port adc. Be careful with timing on the adc port. It is very easy to get timing violations which only will show up in real hardware.