Hi i am learning to use Quartus II, At the moment i am trying to just generate a sin wave for a stratix II board. I have set up the NCO block and got the symbol on the block diagram but i have no idea where to go from here. Can anyone give me the direction to go in or a diagram i can copy from? Thank you

Hello You used the megawizard to create the block? So you already set up all the parameters necessary right? If so, all you need is to connect the appropriate signals on the inputs and outputs of the module. The phi_inc input controls the frequency of your sine wave. If you want a fixed frequency just connect this input to a constant. On the megawizard there is a field where you choose the desired output frequency and it gives you the value of the phi_inc (phase increment value parameter). The output frequency is given by the following equation (page 4-4 of the NCO user guide) fo = ( (phi_inc) * fclk ) / 2^M, where M is the accumulator precision and fclk is the clock frequency. clk is the clock input. Connect this to your clock input source. reset_n is the reset ('0' -> reset; '1' -> normal operation). Connect this to your reset control clken is the active high clock enable. fsin_o and fcos_o are the sine and cosine outputs respectively. out_valid is high whenever there is a valid sine or cosine data output. I hope this can help you Regards Thiago

I discussed some aspects of generating a sine rom in VHDL in a previous thread. If you don't want to use the Altera NCO core for some reason, you can get an idea how to implement a basic NCO from scratch. [url]http://www.alteraforum.com/forum/showthread.php?t=1902[/rl] I also append a full design example.

Yea I had no problems setting up the megacore. My issue was putting in the inputs and outputs, as I found it hard to find any infomation on this. But i found the factory program so i should be able to sort it now as I am starting to understand the inputs and outputs etc i think. No doubt I will be back very soon :P Thank you for the help.

Hey... I have problems with the NCO too. What do you mean with "just connect this input to a constant" ?? I can only connect the phi_inc input from the NCO-block with input signals. Furthermore, in the Pin Planner, all my added signals from the Block Diagram, like CLOCK and SINUS_OUT, have the direction "unknown".... Thank you for help....

Hello Tobias, Yes, you need input signals to connect to the NCO phi_inc_in but you could use a vhdl module that produces a constant output and connect it to the NCO. In the pin planner you need to run at least an Analysis and Elaboration before you get the correct input and output pins direction ok? Regards Thiago

Implimenting a NCO Core. | Altera Community

23 Replies

Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---
What are the results of your simulation? Nothing at all?
It isn't necessary to map the device pins just to make the simulation work.
Have you configured the clock input pin in your simulation to provide a clock to the pll?
You need to create a waveform file and put the clock input in it, and attribute a clock to this pin so that it can drive your pll.

I hope this helps

Regards,
Thiago
--- Quote End ---

It's posible send to ADC output to visualize in a osciloscope?
Altera_Forum
Honored Contributor
14 years ago
You could try using a logic analyzer in this case

Regards
Thiago
Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---
You could try using a logic analyzer in this case

Regards
Thiago
--- Quote End ---

Do you have the desing to share?

Thank's a Lot!

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Implimenting a NCO Core.

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