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Honored Contributor
Honored ContributorImplementing a Large RAM on Cyclone II - is it possible?
Hi, this is my first time implementing something on FPGA. My instructor is currently very busy and I can't find an answer to my problem, hoped I would find here someone nice enough to help. ...
Altera_ForumHonored Contributor
Honored ContributorHow many of the bits would be accessed at once in a single cycle? More generally, what is the access pattern? Can you reorganize the data in such a way that bits are grouped into tall "columns", and, in any clock cycle, there's at most 2 accesses (2 writes or 1 read and 1 write) to each column?
