Forum Discussion
Seadog
Occasional Contributor
4 years agoIgnored create_clock warning in C V design
I have a Cyclone V design with a DDR 3 controller. The reference clock for the DDR3 EMIF core is routed directly from a clock pin. The .sdc file for the project has a create_clock command for that ...
AdzimZM_Altera
Regular Contributor
4 years agoHello,
Sorry for the delay in this topic.
You can either comment out the create_clock command in the project .sdc file or ignore the warning as has been mentioned by sstrell.
Do you have any further question?
Thanks.
Adzim