HT4
New Contributor
New ContributorI want to use PS programming through CPLD and a flash. I have some uncertainties for programming and circuit design
I am using Cyclone IV GX FPGA
- Does the flash should have specific feature to be able to use as memory for different configuration file? or just meeting the minimum required memory is the only condition?
- can Quartus handle programming the flash with more than one configuration file easily?
- is the core mentioned in Altera documents easy to use and how big is? can that handle easily choosing the right configuration file just through the address?
- should I consider any specific note during circuit design?
