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Altera_Forum
Honored Contributor
17 years agoI want to know the max speed of NIOS ii based on cyclone iii EP3C120N780C
I have a DK-DSP-3C120N KIT,the NIOS II clock can not exceed 100mhz.The highest speed of NIOS II /f is now just 100mhz.The C program always dead when the clock exceed 100mhz.I want to working at least...
Altera_Forum
Honored Contributor
16 years agoThank you very much,BadOmen! The NIOS II/f is now working on the 166.7mhz system clock.I just constraining the input clock,altpll and seg7led I/O port obey your suggestion.But the TimeQuest still report mass unconstrained paths:
--1)Setup Analysis: Unconstrained Input Ports:(1)altera_reserved_tms:No input delay, min/max delays, or false-path exceptions found; (2)altera_reserved_tdi:No input delay, min/max delays, or false-path exceptions found. totally 63 unconstrained paths. Unconstrained Output Ports:(1)altera_reserved_tdo:No output delay, min/max delays, or false-path exceptions found. totally 1 unconstrained paths. --2)Hold Analysis: The unconstrained paths are the same as above. I wonder at the NIOS II/f is working under so many unconstrained paths. How to clear these unconstrained paths? What's the altera_reserved_tms,_tdi,_tdo meaning?