Forum Discussion
Altera_Forum
Honored Contributor
14 years agoI want to design FIR and IIR Filters...
which FPGA is the best?
Cyclone Arria or Stratix14 Replies
- Altera_Forum
Honored Contributor
--- Quote Start --- With such a low speed , resource should not be an issue as you can run on 55 x 500 or more and share one multiplier (MAC). --- Quote End --- thanks, I worried about my cyclone II, I have the opportunity to buy another if necessary but I prefer to work with mine - Altera_Forum
Honored Contributor
--- Quote Start --- FIR filter design literature gives more exact expressions for the required filter length depending on stop band attenuation and pass and stopp band frequency. Typical relative lengths are considerable larger than L > 1/fc. The FIR design chapter of U.Meyer-Baese digital signal processing with fpga gives a brief overview of popular design methods. --- Quote End --- thanks I will review this - Altera_Forum
Honored Contributor
--- Quote Start --- Read these; http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100paper_hawkins.pdf http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100slides_hawkins.pdf http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf There are plenty of cross-references in there for you to look at too. --- Quote End --- thank you so much for the information I´m still reading, there are a lot of interesting things that will be very useful for the filter design - Altera_Forum
Honored Contributor
With such a low speed , resource should not be an issue as you can run on 55 x 500 or more and share one multiplier (MAC).
If you opt for IIR then the phase will suffer (nonlinear). - Altera_Forum
Honored Contributor
--- Quote Start --- Never heard of that cycle explanation?? --- Quote End --- Consider it as my personal rule of thumb "where not to use FIR filters". I didn't say, that a filter with fc = 0.02 and 55 taps isn't feasible. I claim, that it's ability to achieve a specified frequency response will be very limited and thus an IIR filter will better achieve a typical low-pass characteristic. If you doubt, that there is a relation between filter performance and relative filter length, you should compare the results of fc 0.01, 0.02 and 0.1 low-passes with L=55. FIR filter design literature gives more exact expressions for the required filter length depending on stop band attenuation and pass and stopp band frequency. Typical relative lengths are considerable larger than L > 1/fc. The FIR design chapter of U.Meyer-Baese digital signal processing with fpga gives a brief overview of popular design methods. - Altera_Forum
Honored Contributor
--- Quote Start --- I will review more about filters --- Quote End --- Read these; http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100paper_hawkins.pdf http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100slides_hawkins.pdf http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf There are plenty of cross-references in there for you to look at too. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- Never heard of that cycle explanation?? --- Quote End --- neither do I, I will review more about filters - Altera_Forum
Honored Contributor
--- Quote Start --- A different point is, that the filter specification doesn't make much sense for a high-order FIR filter. The problem is, that "order 55" doesn't represent more than a single cycle at the 10 Hz cut-off. This implies, that the filter coefficients don't give much freedom of tuning the filter shape around the cut-off frequency, which would usually be the purpose of a FIR filter. I expect, that a low order IIR filter gives similar performance in this case. You should try yourself with a filter software tool. --- Quote End --- I think I understand your point, but not completely, I´m starting whith FIR and IIR filters so I'm going to check over my desing - Altera_Forum
Honored Contributor
--- Quote Start --- At 500 samples per second your FPGA has many many clock cycles to perform calculations. You can use a single multiplier and RAM and implement the FIR. The IIR should be able to be implemented with 2 (Butterworth) or 5 multipliers per second-order-section. You should perform a bit accurate simulation using a FIR/IIR design tool to determine the filter parameters. --- Quote End --- thanks for the advices I think that I need to have my filter design completely ready first, I'm using Matlab for this I was afraid that my desing wouldn't fit in my cyclone II , I need to determinate all parameters first and chose an implementation - Altera_Forum
Honored Contributor
Any digital filter's cutoff is relative only (e.g. to Nyquist or to Fs).
cutoff = 10/500 = .02 A filter that fulfills this cutoff does not care about actual frequency of signal. Never heard of that cycle explanation??