Forum Discussion
Altera_Forum
Honored Contributor
12 years agoHi,
well if the short to GND is identified to be the FPGA Pin, I assume it is dead, indeed... While I never tested this, it might be possible the FPGA can still be configured by JTAG (but seems to be unlikely IMHO). This might have happened by plugging or unplugging the USB-Blaster in case the voltage differentials beetween your's USB Blaster "GND" and the board's GND are not equalized by GND being the first pin connected. Thus the USB Blaster should either be connected only with board not being powered or your I/F should include the protection diodes as shown in the handbook, limiting the voltage swing to -0,5 and VCCIO+0,5... I have had some prototype Cards with identical effects, as the FPGA was a TQFP144 I saved some for lab testing useage by replaceing the FPGA - the EPCS seem to be either more robust or (more likely) are "protected" by the FPGA... As my Card has an additonal Adapter between the USB Blaster Header and the programming connector I added an additional GND line to have the USB Blaster "grounded" to the FPGA's GND, with this modification I had no additional defects :-D Finally it is repairable by exchanging most likely the FPGA..