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Altera_Forum
Honored Contributor
Honored ContributorI Have imported the correct libraries and still get an error.
So i have this little piece of a datapath entity. library ieee; use ieee.std_logic_1164.all; use IEEE.std_logic_arith.all; use IEEE.std_logic_unsigned.all; entity Datapath is port ( ...
Altera_ForumHonored Contributor
Honored ContributorThe SmSwitches signal is declared as a 3-bit vector. How are you trying to add or concatenate 9 bits into a 3-bit vector ? If you're trying to concatenate bits to form a 3-bit signal then you need to use the '&' operator.
