Forum Discussion
Altera_Forum
Honored Contributor
15 years agofour keys(posedge keyclk touch off):
(1)reset:j=0,run=0; (2)stop:run=~run; (3)sec:j=j+100; (4)min:j=j+6000; sclk:50MHz(clk)->100HZ(sclk) 1% second count(posedge sclk touch off): j=j+1;---->ssclk touch off(avoid conflict between keyclk or ssclk) I add the keyclk to the sensitivity list later(Sorry,I didn't know that error before),but have not any change. I can't understand the sentence of"you can't build a counter from latches". Can you explain it for detail. I give a .doc file,to show a successful case.If you need the project,I will send it. If the overall design is wrong ,how should I do it.I really have not any ideas now.