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直多喜川0's avatar
直多喜川0
Icon for New Contributor rankNew Contributor
7 years ago

I am using a CYCLONE IV E FPGA, but inserting a comment out statement causes a bug.

Although written in verilogHDL, inserting a comment out statement causes a problem.If you delete the comment out statement, it works normally.
Vicky1's avatar
Vicky1
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

I think,it`s not a good way to suggest without looking the complete code.

Could you please provide your code? because the issue we are looking may occur from different place.

-Thanks,

Vikas