HPS power consumption

This post is kinda going in different directions. The original post was whether someone can purchase a board with an SoC device and not bother using the HPS and use the FPGA fabric and the answer is yes you can.

You could probably get away with not even tying off the HPS reset but the boot rom code will attempt to boot up the HPS in that case and it might consume more power that way. If that's no concern then you can simply design the FPGA user design as you normally would and simply not instantiate the HPS block in Quartus. If you want to put the HPS into a lower power state then I think enabling the cold reset port into the FPGA fabric and driving that in should have more power savings than having the CPU execute the WFE instruction. That cold reset will fanout to everything inside the HPS and hold them idle instead of just the CPU.