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Altera_Forum
Honored Contributor
Honored ContributorHPS: h2f_lw_axi_master and h2f_axi_master
Hi, on the DE1 SoC FPGA board I'm writing from HPS/Linux to /dev/mem to the FPGA, on the FPGA I increment the value and put it back to be read from HPS/Linux. First I had everything running over h2f_...
Altera_ForumHonored Contributor
Honored ContributorHi, let me answer in a quite general way, perhaps this will help you more. Have a look into the following tutorial. It's about 10 pages and will give you a good insight of how to work with SoC FPGAs, QSYS, AXI Bridge, Testbench and debugging with Logic Analyzer - these techniques IMHO are the bare minimum, but it's worth it. BTW the examples are for the ARROW SoCKIT and in Verilog, I did it with another Cyclone V board, w/o big deal.
http://zhehaomao.com/blog/fpga/2013/12/22/sockit-1.html
