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Altera_Forum
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11 years ago

HPS: h2f_lw_axi_master and h2f_axi_master

Hi, on the DE1 SoC FPGA board I'm writing from HPS/Linux to /dev/mem to the FPGA, on the FPGA I increment the value and put it back to be read from HPS/Linux. First I had everything running over h2f_...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

HI,

I work on DE1-Soc. I am using a linux BSP (linux console) that i found in terasic's website linux image.

I have some questions about the AXI bridge. In fact i would like to send some data from the hps to the fpga through the AXI bridge ( HPS-to-FPGA AXI ) and then use those data by the FPGA. I created a Quartus project based on the DE1-SOC-GHRD. The DE1-SOC-GHRD includes the file soc_system.qsys which includes hps_0 (HPS component). I would like to use the EPCQ to store the fpga configuration (.sof) And sD card for linux and my app.

Can you give me some advices about how to use the AXI bridge? work to do for the FPGA and work to do for processor?

I am new in Soc, and i found it hard to understand how it works. I read cyclone V handbook but i feel that i missed something and i don't know what.

Thank you for your help.

PS: sorry for my bad english