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Altera_Forum
Honored Contributor
Honored ContributorHPS: h2f_lw_axi_master and h2f_axi_master
Hi, on the DE1 SoC FPGA board I'm writing from HPS/Linux to /dev/mem to the FPGA, on the FPGA I increment the value and put it back to be read from HPS/Linux. First I had everything running over h2f_...
Altera_ForumHonored Contributor
Honored ContributorEDIT: I found my mistake, the C program had the wrong address. Using the lw address I was listening on the main axi bridge and never received anything.
