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tesla's avatar
tesla
Icon for New Contributor rankNew Contributor
4 years ago

HPS and FPGA reset

Hi everybody! I’m working on Arria 10 SoC and I want to verify it is possible to reset the HPS from the FPGA design (per state machine in the FPGA) and to verify it is possible to load the FPGA in...
EricMunYew_C_Intel's avatar
EricMunYew_C_Intel
Icon for Frequent Contributor rankFrequent Contributor
4 years ago

You can configure your FPGA as standalone and not from HPS. In that way, warm and cold reset will not affect your DDR memory.