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tesla's avatar
tesla
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4 years ago

HPS and FPGA reset

Hi everybody! I’m working on Arria 10 SoC and I want to verify it is possible to reset the HPS from the FPGA design (per state machine in the FPGA) and to verify it is possible to load the FPGA in...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

You can configure this in the parameter editor for the HPS. You just enable the signal from the FPGA to reset the HPS. I forget what the parameter is called, but look at the reset control options. As to the second part of your question, think of the device like two separate chips. They can interact with each other through control signals and the highspeed and lightweight busses, but the state of one is not reliant on the other. Resetting the CPU will not affect the FPGA's operation.