How to write(or read) soft IP registers with ARM DS-5?

Dear ashishdevre9,

Examine socal.h (SoC Abstraction Layer) in your Baremetal_Helloworld_HWLib_GNU project.

Use alt_read_word / alt_write_word functions.

See for details the following location in your installed Altera directory:

file:///C:/altera/13.0sp1/embedded/ip/altera/hps/altera_hps/doc/socal/html/index.html

Regards,

V.ZS.

Thanks voroshazi. Your reply certainly helped.

Though, the problem was something else.

I was directly accessing PIO, without performing some required initial procedures.

Actually, Hard Processor(HPS) communicates with soft IPs(on FPGA fabric) through HPS_to_FPGA bridge or LW_HPS_to_FPGA bridge. And DS5 communicates with FPGA soft IPs through HPS.

To access soft IPs of FPGA fabric using HPS, these bridges must be initialized first.

For example, my HPS is connected with my PIO through LW_HPS_to_FPGA bridge, then I need to first initialise this bridge and then the PIO can be accessed after while. The bridge initialisation code is there in Altera_SoCFPGA_HWLib_GNU project.

Hi ashish,

I have to work on a similar requirement, i have to communicate to the PIO function from the ARM HPS, i will be using the HPS2FPGA AXI bridge, but i will be using the baremetal application. I am not completely aware of the Baremetal developmental flow, can you share me the example design whatever you had done to communicate to the 'PIO from ARM. Also any Baremetal details so that i can build on top of it.

Regards,

Chethan T V

Hi,

I'm facing a similar problem. I would like to know if there is a simple way to obtain the base adresses of the different soft IP cores in a system.

In a NIOS system there would be a 'system.h' that lists all the base adresses. I can't find something similar for the SOC devices.

I'm programming a bare metal application, so using the Linux device tree would be a bit difficult.

Regards,

Aldridge

I think the good starting point is the Altera_SoCFPGA_HWLib_GNU example.

If you would like to know the parameters of FPGA slave peripherals from a single header file e.g the base addresses, irq numbers, etc. you have to generate a "system.h" header file (~ similar to BSP/system.h generated by Nios II EDS). These system parameters can be used in ARM DS5 dev. environment. You must use HSP-FPGA interface bridges, and these bridges must be enable (they are in reset state by default - see the above example design for enabling them).

Generating system.h in one step:

sopc-create-header-files $SOPCINFO_FILE --module $HPS_MODULE_NAME --single $SYSTEM_HEADER_FILE

in case of GHRD:

sopc-create-header-files soc_system.sopcinfo --module hps_0 --single system.h

regards,

ZS.V.

Thanks voroshazi,

That was exactly what I was looking for.

Regards,

Aldridge

Hello Everyone,

I have been trying to get the Hardware Lib example to run but this error shows up when debugging.

+reset system

ERROR(TAD43-NAL52):

# in C:\Users\surabhig\Documents\DS-5 Workspace\Altera-SoCFPGA-HardwareLib-FPGA-CV-GNU\debug-hosted.ds:4 while executing: reset system

! Failed to reset device Cortex-A9_0

! Cannot attain state requested.

ERROR(CMD656): The script C:\Users\surabhig\Documents\DS-5 Workspace\Altera-SoCFPGA-HardwareLib-FPGA-CV-GNU\debug-hosted.ds failed to complete due to an error during execution of the script

Target has been reset

Execution stopped at: S:0x00002FA4

Anybody knows what the reason could be?

I'm using Arrows SoC kit and have followed the steps from the documentation.

Any suggestions/insights are welcome.

Thank you,

Surabhi

Best way in this once situation -- close DS-5, in Task Manager remove application with longer name with *-rtti.exe, repower kit, and rerun DS-5, reboot of computer not need.

Only if it stable retries, debug settings is incorrect.

I add to 2nd page on Debug Configurations filename to download hwlib.axf, and it has been loaded also in .ds-script after u-boot-spl, and system hangs in this way

always.

--- Quote Start ---

Best way in this once situation -- close DS-5, in Task Manager remove application with longer name with *-rtti.exe, repower kit, and rerun DS-5, reboot of computer not need.

Only if it stable retries, debug settings is incorrect.

I add to 2nd page on Debug Configurations filename to download hwlib.axf, and it has been loaded also in .ds-script after u-boot-spl, and system hangs in this way

always.

--- Quote End ---

I import the example，altera-socfpga-hardwarelib-fpga-cv-gnu，in the DS-5，but when I bulid the project,some problems come out.

the problems are ：

always_inline function might not be inlinable [-werror=attributes]

make: *** [alt_cache.o] error 1

Do you know how to slove these problems？

Thank you！

Please zip your project folder and include to message !

If all source files is as in Altera-s archive, no problems may be !