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As MAXII datasheet at page 4-7 says, IO ports should be at Tri-state. However, It does not seem that my circuit works like that.
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The MAX II devices work per their data sheet.
Please check the following:
1) Have you ensured that your reset logic is correct? For example, is it synchronized to the clocks within the design?
2) What have you done with unused pins? Do you have extra I/O wired on the board to MAX II pins that your HDL design is not currently using? There are settings in Quartus that can default to driving the unused signals to ground. If you have accidentally selected this setting,
and you have external signals driving those pins on the MAX II, then you can damage the device.
3) Have you checked whether you are violating the MAX II I/O voltage limits? For example, the MAX II devices
are not 5V tolerant.
Post your schematic if you can. People on this list will review it.
Cheers,
Dave
Honored Contributor
