New Contributor
Frequent ContributorHi @MehmetFide,
Yes, as there is no method that mentioned in the User Guide to stop the ongoing DMA.
The PCIe AVMM with DMA is a hard IP. From my understanding, it's not workable to add the Reset functionality to the PCIe BAR Registers as the BAR Registers (Base Address Register) are designated for memory addressing.
User Guide of BAR in Intel Arria 10 AVMM DMA interface for PCIe:
May I know what is your objective to terminate an active DMA operation?
Thanks.
Best Regards,
VenTing_Intel
New ContributorHi @ventt,
We use this DMA to push data in FIFO in FPGA to Linux and at the and of operation we get MSI interrupt. But the FIFO in the FPGA does not always have the amount of the data desired by DMA. Therefore the FIFO throttle the DMA operation using WaitRequest pin until FIFO has enough data requested by the DMA. FIFO may have enough data in 1ms or 3sec or never depends on user action in our final product.
The main problem of the DMA is that once we program it to transmit some data (1024 dword for example) from FPGA to Linux through PCIe, we can not reuse this DMA for other purposes (like read direction instead of write direction) until it completes its existing operations. Since the existing operation completion time is unknown due to user interactions, we want to cancel existing DMA operation and reprogram the DMA for some other tasks.
Thanks.
