Forum Discussion
Altera_Forum
Honored Contributor
10 years agoYes I can use F.P.ToolBox with 2009a version but designer just with 2013.
But when I generated Verilog code by HDL Coder (or Filter) -- why and how difficult I should create testbench. Shoud I do it manually, can I exclude such file of my simulation and could I do it automatically f.e. in DSP, Model-Sim as the Xilinx System Generator has such functionality -- as seems to be. http://www.mathworks.com/help/dsp/examples/generate-hdl-code-for-programmable-fir-filter.html -- here seems no mentioning of F.P. Toolbox and Testbench And very important question -- when I choose Modelsim design files -- there is no files or the whole list that has its sub-parts what I should use if I have generated the hDL file?