Forum Discussion
Altera_Forum
Honored Contributor
10 years agoThe simulation -- what kind of it -- the some graph of digital signals?
"HDL will be generic and not optimized" -- how to optimize? So could I use matlab 6.5 with dsp builder? So how big work to do I need? But in my Scheme I use S-integrator (continuous) in Simulink should I convert it to Z-integrator? And hwo to do it--I need use some additional clock source? And I have workable block system in Simulink--could you (or somebody else) convert in Dsp if it is not a lot of time to do --that I would see the result? And one more question--I created the same system in Labview --but there is difficulties with arrays despite all should be simple integers--and I would like to create FPGA version of it--but FPGA pallette have no integrator by time fucntion--so how can I solve this issue? All other operators such as, +,-, *, <, > are present in FPGA palette? And I say about analog system as the subject of my work is about analog paralel system--but it is probably impossible to do it in Labview or Altera --so why I was supposed to do it in LAbview? Despite Simulink has such tool as Sim2Spice --it seems to be for FPAA but I could not find it? And about HDL Coder--from what version of MAtlab(2012a) it is present? And could I just use this version of Simulink and HDL Coder (with or without HDL verifier)? Yet I would be interested in Verilog design but if it not possible it could be possible to use and VHDL? So as I understand to see simulation of HDL conversion of Simulink blocks I need to use or DSp Blockset, Xilix System Generator or HDL coder. What is simpler and better? And what I should do with my continious-time integrator in simulink?