How to simulate the FPGA neural network in Altera

http://postimg.org/image/m3qrcpqlj/ -- here is the logic circuit that I need to implement. At least in Micro-cap and simulink it should be done without the iterations and Neural Networks. So Could it be donhe in Altera on Verilog. What is the main difficlulties. S --comparator, there is also inverted integartor on time, that multiplies on coeficient alpha(about 1000)--so I do think it could be easier to do in Verilog then Micro-cap for example as there is no libraries for multiplier, even adder, substractor. The only difficult line is integartor..What would you suggested? Sn+2=x-A; Sn+1=x; depending on the K-Sum of Step functions An-X (intial x should be 0--but it is the main bottleneck as x begin rise on some expotential rule). And I am not aware of the fucntion of analog integrator --al other components should be analog, as the source signals should be constant.