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BXia
Occasional Contributor
Occasional ContributorHow to reduce the high fan out nets in Quartus project?
Hi Intel FPGA supporter, We found there are high fan out nets in our project, is there any way to reduce the high fan out nets? Please see the attached image. Thanks in advanced!
KennyT_altera
Super Contributor
Super ContributorMost importantly, you will need to verify if the settings have taken effect in the design. You can do this by checking the report for the duplication of registers to reduce fan-out. Note that duplicating fan-out will not impact functionality, as the duplication is done in parallel rather than in series.
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