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Altera_Forum
Honored Contributor
Honored ContributorHow to reduce Interconnect Delay?!
Hi, I have designed a mux in Cyclone IV-E device. I need to meet the Pin to Pin delay constraint of 10 ns. Tools used are Quartus II 14.0 and Timequest. I am geting data path with delay o...
Altera_ForumHonored Contributor
Honored ContributorWhy do launch and latch clocks say n/a?
Can you post code and relevant SDC?
