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Altera_Forum
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13 years ago

How to receive LVDS ADC data

Hi, My design is still using cyclon I, EP1C4F324C6. It will connect to a serial output A/D conveter which has four lines (represent four channel outputs) and one frame line and one clock line. All...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

The two clocks going to two altddio with the same clock settings turns out a warning after the full compilation. It says that one of the clock settings has been igored. Why? Thanks for your help!