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Altera_Forum
Honored Contributor
13 years agoHi,
It looks like it is working. For EP1C4F324C6 I use a quadrant as a LVDS I/O port area. I cound not find which are specific clock inputs. I need four of this kinds of clock inputs. Currently it works under speed of 280Mb/s of LVDS input bit stream with the data clock of 140Mhz. When the speed reaches to this extrem value the data is unstable. Data error ocurrs. Any sugestions will be very appreciated!