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Honored Contributor
Honored ContributorHow to provide logic inputs?
Hi I am new to Altera 13.1. I have written a OR gate VHDL code and it compiled successfully. I know how to view the waveform using Modelsim Altera. What I want to know is how to provide logic s...
Altera_ForumHonored Contributor
Honored ContributorSorry Janyanth,
I didn't understand your question. Whatever tricky has suggested is correct. You can also use clocks as a input of the OR gate. You can use two clocks in such a manner that frequency of one clock is double then second clock. By doing this you can test all the four possibilities.
