How to program CPLD EPM7128AELC84-10?

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If say I want to assign pin 12 on my EPM7128AELC84 chip which is right at the corner, would I assign the same pin 12 on the 100-pin pin planner? because pin 12 is actually at the middle of the left side on the 100-pin pin planner.

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I said about pin mapping in the device documentation, not to assign the same pin numbers. Pin 12 of 84-Pin PLCC package is e.g. macro cell 3 and mapped to pin 1 of 100-Pin TQFP. Did you ever look at the pin-out document http://www.altera.com/literature/dp/max7k/archives/epm7128a.pdf ?

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EPM7000A family is still supported in Quartus V11, only the LC84 package isn't contained in the device list, because it's apparently obsolete since long. Although there's most likely some trick to enable the LC84 package in Quartus, you don't need to.

There's only one EPM7064A chip with different package bondouts. Thus the programmer doesn't know about the package. Just assign a 100 pin package in your design and review the pin mapping from the Altera device documentation.

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Thank you FvM for the reply. However I am still a little confused as to how to assign the pins. If say I want to assign pin 12 on my EPM7128AELC84 chip which is right at the corner, would I assign the same pin 12 on the 100-pin pin planner? because pin 12 is actually at the middle of the left side on the 100-pin pin planner.

Sorry if this is a dumb question. hehe :-P. Thanks in advance!

EPM7000A family is still supported in Quartus V11, only the LC84 package isn't contained in the device list, because it's apparently obsolete since long. Although there's most likely some trick to enable the LC84 package in Quartus, you don't need to.

There's only one EPM7064A chip with different package bondouts. Thus the programmer doesn't know about the package. Just assign a 100 pin package in your design and review the pin mapping from the Altera device documentation.