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Altera_Forum
Honored Contributor
12 years agoThank you everybody,
I have resolved this problem, because the clock source of the tri-state bridge and the CFI-flash at the SOPC/QSYS system is 56.25MHz in this application, although this is larger than the frequency limit of these components (Altera recommended it to set this frequency higher than 50MHz) , I using a clock crossing bridge and increase this frequency to 75MHz, the 512P30 Flash could programmed successfully, every thing is ok! Thank u.