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Honored Contributor
Honored ContributorHow to keep fpga in low power mode
Hello people, Today i have another question :) My new fpga module (with EP3C25E144) will work only when it gets a command. does its job and waits for the next command. Because of my d...
Altera_ForumHonored Contributor
Honored ContributorThat will depend on how the oscillator's clock enable works.
Some have a "output enable" controlo, some have "power down" control. Anyway, you can also use a ALTCLKCTRL block to gate the clock within the FPGA. In addition to clock enables and clock gating, using low frequency clocks to drive parts of the logic also helps, if applicable.
