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The cost of Using FFs and muxs to read and write the data is expensive.
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Why do you say these resources are "expensive". FPGAs are rich in logic resources. Unless you've used a very high percentage of logic resources or don't have enough left for anticipated future growth, I wouldn't worry about how "expensive" these resources are.
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I once want to use block RAM for my design,but it seem it cant reduce the FFs but also increase RAM.
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If you are short on available logic resources and have memory resources unused, then there are multiple Quartus settings that can implement some logic in RAM blocks.
Many of these settings are covered by Tools --> Advisors --> Resource Optimization Advisor --> Logic Element Usage. Some settings in this advisor will reduce the logic resource utilization without using RAM blocks; some are related to moving logic from LEs to RAM blocks.
If the logic resources are full, then you can map some logic to RAM blocks using Assignments --> Settings --> Fitter Settings --> Physical Synthesis Optimizations --> Perform logic to memory mapping.
You might have logic that could be implemented in RAM blocks if you do it manually even if the Quartus settings won't do it automatically.