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Yt_aem's avatar
Yt_aem
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3 years ago

How to implement LFPS in Cyclone 10 GX transceiver IP

Hi, I am gonna design a USB3.0 port by using the Cyclone 10GX transceiver IP. In USB3.0/3.1 it needs to send a side band signal, Low frequency Period Signal(LFPS) to other partners . Is there anyone...
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Farabi's avatar
Farabi
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hello,

Please refer to attached C10GX220 devkit sch and go to page 24.

In page 24, you will see component TUSB1002RGER, which is the one handling the LFPS.

datasheet link: https://www.ti.com/lit/ds/symlink/tusb1002.pdf (see page 14)

Regarding USB3.1 IP for this board is provided by SLScorp and this is paid IP. If you need access to the IP and its internal design, you may need to contact SLSCorp. link: https://core.slscorp.com/ip-cores/communication/eusb-3-1-gen-2-device-controller-eusb31sf.html

regards,
Farabi

Yt_aem's avatar
Yt_aem
Icon for New Contributor rankNew Contributor
3 years ago
Hi Farabi,
Thank you for your response.
But, from the block diagram of TUSB1002 (@page14) it only shows that it only can detect LFPS at RX ports while doesn’t mention how to generate LFPS at TX ports.
Please advise further. Very appreciated!
  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    3 years ago
    Hi,
    according to my knowledge, Agilex 7 F-Tile PHY implements the first and only LFPS detector available with Intel FPGA. Apparently no dedicated LFPS generator. Presume it has to be implemented by oversampling, should work for Cyclone 10 GX too.