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Altera_Forum
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7 years ago

How to guarantee the maximum frequency when combine multiple IP cores?

I’m planning to design a signal processing system with Arria 10 SOC, using ALTERA_FP_FUNCTIONS, on-chip RAM and FFT IP Core. Each of IP Core works correctly with the frequency up to 350MHz, but the m...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

Did you do a timing analysis? Use report timing (setup, hold) to the main clock in Timequest. You will get a list of the top failing paths.

Are all outputs of the IPs registered? You may need to adjust the timing constraint file (toplevel, pinning changed).

Jens