How to Create a 2-Port RAM in MAX II LPM doen't support my feature Requirements

Some quick issues to think about:

1) Having no clock doesn't make sense, as how would the hardware "know" when to write into the memory. If it's continuously writing, you'll have problems. For example, if your address changes from 000 to 111, not all bits will change at the same time. So it might pass thru addresses 100 and 101 on its way to 111. If those addresses get written with the value, you'll have problems.

2) If targeting the Max II family, there is no embedded memory and this will be created out of registers. As such, you can have synchronous writes and asynchronous reads. If targeting a family with embedded memory, it will have synchronous writes and reads.

3) Memory Full Output Pin? That makes sense with a FIFO, but not a RAM. A RAM is randomly accessed, meaning there is no definition of full. Is it full when you've written all 8 locations, or when you've written locations 0 and 7? You would need to write external logic to watch what has and has not been written to and make a decision based on your criteria. (Or use a FIFO, if that's what you really want.)