Honored ContributorHi,
I create a D flip flop with positive edge input clock. when I do pin assignment for the input clock, which is PIN_N2, I have no idea how to manipulate the clock frequency. May I know how to control the clock frequency? thanks!
Honored ContributorWithout placing an external clock generator, usually a crystal oscillator, there is no clock frequency.
Honored ContributorHi,
Thanks for reply. May I know timer analyzer can use to control the clock frequency? I want to see the blinking leds from the output counter in bits on de2 board. but they run too fast and I don't know how to adjust the output speed. thanks!Honored ContributorI hear from your answer, that you already have a clock source connected to your FPGA. You have to divide the input frequency to get a visual result. The timing analyzer doesn't change a clock frequency. A PLL or a counter can.
Honored ContributorYou have to add some VHDL code that uses a counter to divide the clock.
For example you create a counter (in VHDL) with the clock as inputclock that counts to a million (or more). And once the counter reaches a million you change the state from the LED (so on or off). A PLL is too complex for this purpose and I doubt that is what you want/need to do. So something like this (this is AHDL, with probably some syntax errors): SUBDESIGN counter ( clock : INPUT; LED_OUT : OUTPUT; ) VARIABLE count[20..0] : DFF; //create a counter that can count to 2^21-1 =1048576 LED : DFF; //help flipflop BEGIN count[].clk = clock; //link clocks LED.clk = clock; count[].d = count[].q+1; //start counting If Counter[21].q==1 Then LED = not LED; //change state Counter = 0; //reset counter end if LED_OUT = LED; //Link help flipflop to output END;
