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Honored Contributor
Honored ContributorHow to configure cyclone 3
I have questions to ask.
1.IN the figure, if the VCCIO supply of the bank in which nstatus pin resides is 3.3v,is the nstatus pin pull-up resistors voltages 3.3v in AS MODE?? 2.IN the figure,the TDI pin pull-up resistors voltages is Vcca. DOES Vcca represent voltage (analog) for phase-locked loop (PLL) regulator? Does the TDI pin pull-up resistors voltages have Nothing to do with the VCCIO supply of the bank in which the TDI pin resides in JTAG mode?? the 4 pin voltage is Vcca in JTAG mode ,DOES 4 pin voltage have Nothing to do with everything? the 4 pin voltage is 3.3V in AS mode ,DOES 4 pin voltage have Nothing to do with everything? 3.IF MSEL [3..0]=0100,is the logic '1' Vcca or the VCCIO supply of the bank in which the configuration pins reside? IF MSEL [3..0]=0010,is the logic '1' Vcca or the VCCIO supply of the bank in which the configuration pins reside? thanks1 Reply
Altera_ForumEverything is answered in the hardware handbook. Unfortunately you didn't show the respective annotating text. Supplying the USB Blaster and respective pull-up resistors by VCCA (2.5V) rather than VCCIO (mostly 3.3V) is a special idea that Altera has introduced to reduce the risk of overvoltages at the FPGA pins. I expect that it's working correctly, but prefer to ignore it up til now and use clamp diodes at the JTAG pins instead. But in case of doubt, you should follow the Altera suggestions.
