how to configure & initiate one FPGA by using another FPGA?

Basic JTAG timing informations can be found in the boundary scan chapter of Altera device handbooks. For the generation of Altera private configuration JTAG commands, you can e.g. refer to the JRunner project, see AN414 and respective code examples.

Are You sure You need to do it using JTAG? I'd offer to use Passive Serial mode.

okay, passive serial mode is okay, could you please tell me the detailed timing diagrams for the passive serial mode? thanks a lot!

This should be documented on altera.com, but I've heard that people using this mode up to relatively high speeds (10Mbps?)... So I doubt timing will be issue here :)

thanks for your quick reply, I will try to find if there are enough documents....

SRunner project, see AN418.

okay, I will read it soon, thank you very much !

I don't see such file type output like .rpd in available options. Are You sure it's FPGA bitstream image? I've tested using .ttf and bitbanging it from microcontroller - works fine.

I reviewed AN418 and found, that it actually describes EPCS chip programming rather than FPGA passive serial configuration. I apalogize for the confusion. Most people use binary *.rbf files or e.g. *.ttf for passive serial.