Forum Discussion
Altera_Forum
Honored Contributor
16 years agoIf you use VHDL, searh for Component and port map.
You can also try to use a schematic, you create a bloc of your modules and you link theme with cables...If you use VHDL, searh for Component and port map.
You can also try to use a schematic, you create a bloc of your modules and you link theme with cables...