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Was there any additional findings on this topic?
This page gives some of the formulas:
http://www.altera.com/support/devices/pll_clock/basics/pll-basics.html FREF = FIN / N
FVCO = FREF × M = FIN × M/N
FOUT = FVCO / C = (FREF × M) / C = (FIN × M) / (N × C)
But I still do not understand how to calculate M, N and C for any given output frequency with a fixed input frequency.
Here's an example: With a fixed Fin=25MHz, I would like to generate Fout=37MHz. The Megawizard calculates M=111, N=5, C=15. How were these calculated?
I would like to reconfigure the PLL with an arbitrary Fout from 1MHz to 40MHz. I would use a processor to calculate these M,N and C values and then utilize the Altera PLL Reconfig Megafunction.
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As far i remember you can find different sets of M,N,C that can generate the same output frequency. As you can see from your example the M value is the greater number, than C and finally N. So you can write a very simple software (e.g. C#) with three FOR cycle one inside the other. The outer FOR is to increment N, the middle FOR is to increment C and the inner FOR is to increment M. At every iteration you must calculate the output frequency and check if the result is the desired frequency. If ok you have the set of M,N,C that generate your frequency. Please keep in mind that M,N,C are limited to 9bit wide (i think)
example:
for (n=1; n<n_max; n++)
for (c=1; c<c_max; c++)
for (m=1; m<m_max; m++)
calculate frequency and compare
exit if result is ok
I think that you can make something similar also in vhdl.
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