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Altera_Forum's avatar
Altera_Forum
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14 years ago

how to address DDR2 memory effectively

I'm currenly using the Altera HPC2 controller to access 4 x DDR2 (MT47H16M16 - 4 Meg x 16 x 4 banks). They all share the common access pins. (just think of it as one big memory with 64 bit data bus - 16 bit each x 4 = 64)

Row address: A[12:0]

Bank address: BA[1:0]

Column address: A[8:0]

Total address bits: 24

When I put this through the Megawizard, it drops the lowest column address bit and I only have (22:0) which is 23 bits.

I need to divide the memory up for 8 regions (7,6,5,...0) to store 2 frames, one current frame and one previous frame and each of which has 4 quadrants.

The access sequence is: while writing the current frame quadrant 0 to memory region 4, I'm also reading out the previous frame quadrant 0 from memory region 0. And this is repeated alternatively.

My plan is to use the address(22:20) to create this 8 memory regions of (19:0).

My question is how to access the memory effectively to reduce the internal column/row/bank overhead cycles?

Your comment or feedback is much appreciated.

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Generally, bank change is less expensive than row change, so the read and write pages may be to different memory banks.

    You also may take into consideration some kind of proportion between the row of data and the row of memory. Are you going to write/read consequently some set of data? For example, if you are buffering video frames (only buffering), it is likely that you access an entire row of pixels in sequence. In this case, you should place all these pixels on the same memory row. If you are doing some other kind of elaboration (searching common patterns among the old and the new frame), things start to depend on your algorithm, on how and how often it will access the memory.

    Consider if you are going to share this frame buffer memory with program memory or other

    applications.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    The reason I need to use the DDR2 for frame buffering is because the video comes in from 4 different stream. Each stream represents a quadrant of a frame. Hence I need to store them in the frame buffer so that I can read them out line by line.