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Altera_Forum
Honored Contributor
15 years agohow to address DDR2 memory effectively
I'm currenly using the Altera HPC2 controller to access 4 x DDR2 (MT47H16M16 - 4 Meg x 16 x 4 banks). They all share the common access pins. (just think of it as one big memory with 64 bit data bus -...
Altera_Forum
Honored Contributor
15 years agoGenerally, bank change is less expensive than row change, so the read and write pages may be to different memory banks.
You also may take into consideration some kind of proportion between the row of data and the row of memory. Are you going to write/read consequently some set of data? For example, if you are buffering video frames (only buffering), it is likely that you access an entire row of pixels in sequence. In this case, you should place all these pixels on the same memory row. If you are doing some other kind of elaboration (searching common patterns among the old and the new frame), things start to depend on your algorithm, on how and how often it will access the memory. Consider if you are going to share this frame buffer memory with program memory or other applications.