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Altera_Forum
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16 years ago

How Many LEs will my Design Take Up

Hello, I apologize in advance if this has been answered before, but I am not sure what keywords to search for. I have implemented a design in Quartus, which will be programmed to a Cyclone III ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

GPK,

Thank you for your reply. I believe I found the information I was looking for (copied below). Unfortunately, I'm very new to FPGAs, and I'm not entirely sure what the numbers mean. According to the manual, my device has ~45K LEs available. None of these numbers are out of 45K. Should I just multiply 0.18 x 45000 to determine the number of LEs my design is occupying?

Logic Utiliization (18%)

Combinational ALUTs (6955/38000)

Memory ALUTs (0/19000)

Dedicated Logic Registers (1177/38000)

Total Registers (1177)

Total Pins (450/488)

Total Virtual Pins (0)

Total block Memory Bits (548864/1880064)

DSP Block 18-bit elements (212/216)

Total PLLs (0/4)

Total DLLs (0/4)

Thank you,

Bill