Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

How long does the FPGA complete the initialization?

Hi dears: I found below information inside Altera configuration handbook: "By default, the internal oscillator is the clock source for initialization. If the internal oscillator ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks for ur information!

Another question, the FPGA how to know which word or byte is the last one when configuring thru AS mode? Is there any sign inside configuration stream? If so, can user recognize it?