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Altera_Forum's avatar
Altera_Forum
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12 years ago

How fast can a FPGA sense?

I found a problem if i keep pressing and releasing the button. I found that the FPGA get crazy, can't really follow the logic. So i think it's the problem of the duration time of the button at ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Use the SignalTap II logic analyzer to probe the signal. You'll likely see that it changes state rapidly due to contact bounce as mentioned by Daixiwen.

Keep in mind that logic level changes on your external signal are completely *unrelated* to the clock. FPGAs are synchronous systems and expect synchronous signals.

Your external asynchronous "button" signal should be passed through a synchronizer (cascade of flip-flops) before being used in a clocked process.

Cheers,

Dave